The invention relates generally to an integrated circuit (IC) for an electronic timepiece, and more particularly to an IC including a semiconductor nonvolatile memory for controlling the function of a timepiece and to improvements in the method of testing the IC after being mounted in the electronic timepiece.
Conventional ICS for electronic timepieces include semiconductor nonvolatile memories such as erasable programmable read-only memories (EPROMs). Testing of the IC is required to determine whether the IC operates in accordance with the data written into the EPROM. Such testing includes writing and erasing data to and from the EPROM every time it is checked.
By using the data stored within an EPROM to control the operation of the IC, the IC becomes multifunctional and has a wide variety of applications. When an IC includes a plurality of EPROMs, testing of almost all possible combinations of data stored in the EPROMS which can be used by the IC is necessary to ensure that no erroneous data has been written into the EPROMS. The time required to test substantially all combinations is extremely long due to the writing and erasing of data to and from each EPROM using conventional test methods. Therefore, not all combinations are tested.
Electronic timepieces loaded with ICs have relatively high production costs stemming from the relatively high expense and reduced production yield associated with such ICs. When the EPROM is of an ultraviolet ray erase type, the erase time is particularly prolonged further aggravating and accentuating the above-noted drawbacks.
Accordingly, it is desirable to provide an EPROM for use with an electronic device such as, but not limited to, an electronic timepiece which can be tested easily and in a relatively short period of time.